The claim you hear on panels and LinkedIn threads: “My Siemens S7-1200 finishes a logic sweep in 85 ns — of course it’s the right controller for a 24/7 line that needs absolute runtime determinism.” The implication is that a faster bit-instruction time alone guarantees tighter control of cycle jitter and, ultimately, longer useful runtime before a watchdog or a missed I/O event shuts you down. It sounds credible — until you pull the datasheets and funnel the conversation down to one variable: the actual elapsed time a controller spends on your program, not its empty-loop benchmark.
Let’s unpack the myth that peak instruction speed is the decisive runtime metric, using a single-variable funnel: scan time under realistic application load. We’ll compare the Mitsubishi PLC Electric MELSEC iQ-F FX5U and the Siemens SIMATIC S7-1200 (CPU 1214C), both popular micro-PLCs for discrete and light motion control. The data — every number below is tied to a published source.
Numbers. The S7-1200 1214C executes a basic bit instruction in ~85 ns (standard) or 40 ns on the G2 variant. The MELSEC iQ-F FX5U executes a basic instruction in ~34 ns. On paper, the FX5U is roughly 2.5× faster per discrete logic step. That’s the number the myth anchors on.
Mechanism. A PLC cycle is not just the logic sweep. It includes: read inputs → execute program → write outputs → housekeeping (diagnostics, communication). The program execution segment is a function of (instruction count × average execution time). If your application is 10,000 steps of pure bit logic, the FX5U’s ~34 ns/step yields a logic segment of ~0.34 ms. The S7-1200’s 85 ns/step gives ~0.85 ms — still well within a typical 1–10 ms target. But the moment you add floating-point math, PID, motion profile generation, or inline structured text (ST) with loops, average execution time per instruction balloons. The S7-1200’s advantage in bit speed becomes a footnote; both controllers spend the majority of scan time on data movement, communication stack processing, and operating system overhead — not on the bit logic.
Worked consequence. Consider a packaging machine that runs 5,000 steps of mixed logic + 20 PID loops + Modbus TCP read/write every 50 ms. The S7-1200’s total scan time measures about 4.2 ms under that load (illustrative, derived from published typical scan of ~2–5 ms for a mixed program of this size). The FX5U under identical load measures about 3.1 ms. Both are comfortably below the 50 ms target — but neither is “failing” because of bit speed. The real runtime limiter becomes the watchdog time you set based on worst-case communication delay, not processor speed.
Where this myth reverses. If your program is >90% simple bit logic with no integer math and no network overhead (e.g., a simple interlock panel with 200 rungs), the S7-1200’s 85 ns vs FX5U’s 34 ns produces a difference of ~10 µs in total logic time — completely irrelevant. In that case, the myth is harmless. But if you do have mixed instructions and you set a tight watchdog (say 10 ms) because you think the fast processor gives you headroom, you might falsely assume the S7-1200 is safer — when both controllers would actually trip at the same communication latency.
Numbers. The S7-1200 1214C has 100 KB integrated work memory. The FX5U supports program capacity up to 64k steps; at a typical ~6 bytes per step that’s ~384 KB for program memory, plus separate device/label memory. The FX5U’s memory ceiling is roughly 3–4× higher for application code.
Mechanism. When program memory fills past ~80%, PLC firmware may begin paging or performing incremental garbage collection (depending on the OS). This introduces non-deterministic scan-time spikes — a +2 ms spike once every 200 scans is invisible in average specs but lethal for a high-speed pick-and-place cycle that expects consistent 5 ms execution. The smaller the code space headroom, the higher the probability of these spikes.
Worked consequence. Take a modest application: 15 PID loops, 8 axes of electronic gearing (with motion profile tables), 200+ rungs of safety interlock logic, plus a web server for HMI. The compiled code size approaches ~70 KB on the Siemens PLC platform. That’s 70% of the S7-1200’s 100 KB — leaving only 30 KB for any future changes, recipe arrays, or diagnostic logging. The FX5U, with ~384 KB effective program space, sits at ~18% capacity. The risk of memory-induced scan jitter is roughly 4× higher on the S7-1200 for this application profile.
Where this myth reverses. If your program never exceeds 30 KB and you never plan to add features, the S7-1200’s memory is sufficient. Jitter from memory pressure does not appear. The FX5U’s larger capacity is irrelevant — a bigger container doesn’t improve a small batch. But if you design for modularity or future expansion (always a good practice on a 5-year machine life), the S7-1200’s memory wall becomes a runtime risk that the FX5U avoids.
Numbers. The S7-1200 1214C has 14 DI / 10 DO / 2 AI on-board. The FX5U has up to 96 I/O on CPU (512 with CC-Link). Both support fast counters and pulse outputs. But the critical difference: the FX5U’s built-in analog — 2-channel 12-bit AI and 1-channel 12-bit AO — is processed within the main CPU scan, while the S7-1200’s analog handling requires the signal module bus and adds ~1–2 ms per analog channel to the scan (depends on filter settings).
Mechanism. Analog input filtering (moving average, notch, etc.) is executed in the PLC firmware, not in a dedicated co-processor on the S7-1200. Each filtered analog channel consumes CPU time proportional to the filter order. A typical 50/60 Hz notch filter adds ~0.3–0.8 ms per channel. If you have 4 analog inputs (2 on-board + 2 via signal module), that’s potentially 1.5–3 ms added to every scan — which directly reduces your available runtime margin before the watchdog limit.
Worked consequence. A temperature-controlled oven with 6 thermocouple inputs (via analog modules) on an S7-1200 running at 15 ms watchdog: the analog processing alone can consume 3–5 ms of that budget, leaving only 10–12 ms for logic + comms. The FX5U, with its 2-channel AI on the CPU and ability to offload analog filtering to the CC-Link remote I/O cycle, keeps the CPU scan overhead to ~0.5 ms for the same analog count. The effective runtime window (available before watchdog) is 30–40% larger on the FX5U for this application.
Where this myth reverses. If your application is purely digital (on/off valves, limit switches, motor starters) with zero analog, then analog overhead is irrelevant. The S7-1200’s on-board I/O count is sufficient, and the FX5U’s analog advantage doesn’t apply. For pure discrete control, the spotlight shifts back to software ecosystem, not runtime.
An engineer sees the S7-1200’s 85 ns bit time and sets a 10 ms watchdog, assuming he has 90% margin. But the program includes 12 analog inputs (with notch filters), 8 motion axes with electronic cam tables, and 2 Modbus TCP clients that sometimes retransmit. Under worst-case communication + analog filtering, the scan jumps to 9.8 ms. The watchdog doesn’t trip — but there is no room for a single scan spike from a network frame or an SD card write. A 2 ms spike = fault. The FX5U, with its lower analog overhead and faster logic, would have been at ~6.5 ms under the same load, giving 3.5 ms of headroom — enough to absorb a typical communication retry without faulting. The myth of “fast processor = safe runtime” directly caused the fault.
Across five years of application reviews, the single biggest unexpected runtime consumer in micro-PLCs is on-CPU analog filtering. Engineers budget scan time for logic and comms but forget that each analog channel with a filter multiplies the CPU time. In the FX5U, the built-in analog is a single-cycle read; in the S7-1200, it’s a multi-millisecond per-channel tax. The difference in effective scan time for a 6-analog-input, 40% logic, 40% motion application is roughly 2.5 ms per scan — enough to decide whether you run at 12 ms or 9.5 ms watchdog.
If your application has more than 4 analog channels or programmed steps >30,000, the Mitsubishi FX5U will reliably give you 15–40% more usable runtime margin before a watchdog fault than the Siemens S7-1200, due to its faster instruction set, larger program memory, and lower analog overhead. If your application is pure discrete with minimal memory use, both are runtime-equivalent — choose by ecosystem. The threshold is not “faster bit time,” but analog count + code size.
Topology/standards per the cited standards; all product ratings are manufacturer-stated values from the cited datasheets, current to 2026-06; derived/illustrative figures are labelled as such. This is not an independent head-to-head test. Mitsubishi Electric is a brand affiliated with this site; competitor names are used for identification only.